Software defined radio - SDR
System consists of software defined radio NI USRP 2954 and control unit (personal computer with peripheral). SDR is connected to the PC with PCle x4 Gen 1 bus, which is made for high speed data transfer from SDR to PC. A fast PCle hard drive allows storage of data with specific defined parameters. The whole system control is ensured by software developed in the LabVIEW graphics environment. LabVIEW is a graphics development environment optimized for application development in the field of measurement and control. It is also made for development of applications with general purpose uses. Systems made in LabVIEW can be used for the most demanding tasks. LabVIEW can cooperate with a lot of different types of measuring equipment. LabVIEW allows programmers to integrate their own source code made in several programming languages.
Module LabVIEW Communications is configured for working with software defined radio and contains support functions which allow to creation of applications for a PC processor; field programmable gate array FPGA; and manage connected devices.
Main parameters:
- Number of channels in common broadcasting: 4
- Number of channels in common receiving: 4
- Minimum frequency range from 10 MHz to 6 GHz
- Bandwidth of real-time processed signals is 84 MHz and in frequency band from 50 MHz to 800 MHz
- Bandwidth of real-time processed signals is 160 MHz and in frequency band from 800 MHz to 5 GHz
- Frequency step: ≤ 1 kHz
- Gain range of the transmitter from 0 dB to +31.5 dB for each channel
- Gain range of the receiver from 0 dB to +31.5 dB for each channel
- Gain step of the transmitter: ≤0.5 dB
- Gain step of the receiver: ≤0.5 dB
- I/Q sample rate: ≥200 MS/s for each channel on FPGA platform
- Continuous data record with I/Q sampling speed ≥ 50 MS/s for ≥ 2 channels with; each channel has minimum bandwidth 40MHz and the length of the signal recording ≥ 30 minutes
- Analog to digital converter for receiver with resolution 14 bits
- Digital to analog converter for transmitter with resolution 14 bits
- Device must be able to perform real-time processing of received signals with the use of FPGA platform in whole frequency band
- Build-in GPS receiver ensures synchronization of local oscillator; accuracy of synchronization is ≤ 5 ppb
- SDR is connected to control unit with PCIe Gen1x4 bus.
Receiver of random signals (2 pcs)
- Number of channels in common broadcasting: 2
- Number of channels in common receiving: 2
- Minimum frequency range from 400 MHz to 4.4 GHz
- Bandwidth of real-time transmitted signals is 120 MHz in frequency band
- Bandwidth of real-time received signals is 120 MHz in frequency band
- Frequency step: ≤ 10 kHz
- Gain range of the transmitter from 0 dB to +32 dB for each channel
- Gain range of the receiver from 0 dB to +37 dB for each channel
- Gain step of the transmitter: 0.5 dB
- Gain step of the receiver: 0.5 dB
- I/Q sample rate: ≥200 MS/s for each channel on FPGA platform
- Analog to digital converter for receiver with resolution 14 bits
- Digital to analog converter for transmitter with resolution 16 bits
- Device is able to perform real-time processing of received signals with the use of FPGA platform in whole frequency band
- PCIe-MXI Express Interface kit for USRP RIO
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Accessories:
- 2 flexible, phase stable cables with 3.5 mm (male) connectors, length ≥ 350 mm
- 2 fixed attenuators with attenuation 30 dB
Coherent receiver - 4 channels (2 pcs)
- Number of channels in common receiving: 4
- Minimum frequency range from 10 MHz to 6 GHz
- Bandwidth of real-time transmitted signals is 80 MHz in frequency band
- Frequency step: ≤ 1 kHz
- Gain range of the transmitter from 0 dB to +95 dB for each channel
- Gain step of the transmitter: ≤1 dB
- I/Q sample rate: ≥100 MS/s for each channel on FPGA platform
- Analog to digital converter for receiver with resolution 14 bits
- Devise is able to perform real-time processing of received signals with the use of FPGA platform in whole frequency band
- Noise number <8 dB in frequency band
- Frequency accuracy 2.5 ppm
- Local oscillator is used for all channels of receiver
- Short-term and long-term signal delay stability on all channels ≤ 500 ps
- Phase noise ≥ -82 dBc/Hz in frequency band
- PCIe-MXI Express Interface kit for USRP RIO
SDR accessories
- 8 antennas (vertical omnidirectional) for receiving in mobile networks bands 900 MHz and 1800 MHz
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Wiring:
- 4 flexible, phase stable cables with 3.5 mm (male) connectors, length ≥ 350 mm
- 4 fixed attenuators with attenuation 30 dB
8 channel digitizer
- 8 channel digitizer build on platform PXle
- Resolution: 10 bits
- 500 MHz bandwidth at input impedance 50 Ω
- All channels are simultaneously sampled
- Sampling frequency 2.5 GS / s with 1 or 2 channels
- Sampling frequency 1.25 GS / s with 3 or more channels
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Connection of trigger signals:
- Analog trigger connected to all 8 oscilloscope channels
- Input for digital trigger signal usable for stopping and triggering measurements
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Digitizer software:
- Academic license for research purposes for 30 concurrent users
- Digitizer drivers for development environments commonly used by the developer (Matlab, LabVIEW and Visual Studio C / C++)
- An application for configuring digitizer parameters and subsequently measuring and processing measured data
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The graphical development environment includes:
- Device control and real-time data processing, data retrieval from a file, and offline processing
- Creating user interfaces to visualize processed data
- Signal processing via function libraries including statistical calculus, signal processing - resampling, thresholding, signal filtration
- Saving both measured and processed data into binary data file formats in custom format, CSV and XML
- Automated creation of logs from metrics containing tables, text, and graphs for editing in common spreadsheets or text editors
Ettus X410 (2 pcs)
The NI Ettus USRP X410 is a high-performance, multi-channel software-defined radio. The SDR is designed for frequencies from 1 MHz to 7.2 GHz, tunable up to 8 GHz and features a two-stage superheterodyne architecture with 4 independent TX and RX channels capable of 400 MHz of instantaneous bandwidth each. Digital interfaces for data offload and control include two QSFP28 interfaces capable of 100 GbE, a PCIe Gen3 x8 [1] interface, as well standard command, control, and debug interfaces: USB-C JTAG, USB-C console, Ethernet 10/100/1000. The USRP X410 is an all-in-one device built on the Xilinx Zynq Ultrascale+ ZU28DR RF System on Chip (RFSoC) with built-in digital up and down conversion and onboard Soft-Decision Forward Error Correction (SD-FEC) IP.
- High channel density
- Stand-alone (embedded) or host-based (network streaming) operation
- Fully integrated and assembled
- 1 MHz to 7.2 GHz frequency range (tunable up to 8GHz)
- Up to 400 MHz of instantaneous bandwidth per channel
- 4 RX, 4 TX in half-wide RU form factor
- Xilinx Zynq-Ultrascale+ ZU28DR RFSoC
- Two QSFP28 ports (10 Gigabit Ethernet, 100 Gigabit Ethernet, Aurora)
- Two iPass+™ zHD® Interfaces (PCIe Gen3 x 8)
- RJ45 (1 GbE) [1]
- 10 MHz Clock reference
- PPS time reference
- Trig In/Out Interface
- Built-in GPSDO
- Two FPGA Programmable GPIO Interfaces (HDMI)
- 1 Type C USB host port
- 1 Type C USB port (serial console, JTAG)
- USRP Hardware Driver™ (UHD) open-source software API version 4.1.0 or later
- RF Network on Chip (RFNoC™) FPGA development framework
- GNU Radio support is maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio
Ettus E320
The USRP E320 brings performance to embedded software defined radios by offering four times more FPGA resources compared to the USRP E31x devices. The USRP E320 also introduces improvements in streaming, synchronization, integration, fault-recovery, and remote management capability. This field deployable SDR continues to use the flexible 2×2 MIMO AD9361 transceiver from Analog Devices, which covers frequencies from 70 MHz – 6 GHz and provides up to 56 MHz of instantaneous bandwidth.
- Passive cooling enclosure
- Remote management capability
- Stand-alone (embedded) or host-based (network streaming) operation
- Wide frequency range: 70 MHz to 6 GHz
- Up to 56 MHz of instantaneous bandwidth
- RX, TX filter bank
- Xilinx Zynq-7045 SoC
- 1 SFP+ port (1 Gigabit Ethernet, 10 Gigabit Ethernet, Aurora)
- 1 RJ45 port (1 GbE)
- Clock reference
- PPS time reference
- Built-in GPSDO
- 1 Type A USB host port
- 1 micro-USB port (serial console, JTAG)
- USRP Hardware Driver™ (UHD) open-source software API version 3.14.0 or later
- RF Network on Chip (RFNoC™) FPGA development framework
- GNU Radio support maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio
